This invention relates to analog-to-digital (A/D) converters, and more particularly, to modified dual-slope A/D converter systems which can be integrated on a single all-CMOS chip.
The most sophisticated prior art A/D converters typically are constructed on a minimum of two integrated circuit chips, require an external clock input, and are connected to numerous off chip capacitors, resistors and diodes. Frequently these off chip components must either be matched or of the high precision variety. While some of these prior art A/D converters may have an autopolarity feature whereby the converter automatically senses and adjusts to either a positive or negative input polarity, virtually all of them require a manual zero and full scale calibration prior to each measurement. Additionally these circuits are often highly temperature sensitive so that for any change in operating temperature there must be a manual recalibration. Another difficulty often inherent in these prior art devices is that they require an undesirably high current drain from either the unknown input signal or from the reference voltage source.
The present invention provides an A/D converter which is totally constructed on a single CMOS integrated circuit chip. A self-contained clock is included on the chip. The system has both autopolarity and auto-zero features, whereby either positive or negative input voltages are accepted for measurement. Only a single reference voltage is required. During each A/D conversion cycle the system automatically compensates for the offset voltage in each of its two op amps and eliminates error due to comparator hysteresis. This latter group of features totally eliminates any necessity for an operator to make manual adjustments while using the A/D converter system. Drifts in op amp offset voltages and comparator threshold are major factors causing temperature related errors in A/D converters. The present system avoids these errors by updating the corrections for these effects during each conversion cycle. The system also excludes comparator hysteresis or lag as an error producing factor by causing the comparator threshold always to be approached by ramp voltage having a constant slope and polarity. The system has an inherently high input impedance requiring less than a one nanoamp current drain from either the input signal or from the reference voltage source. This single chip A/D converter system requires only two external resistors and two external capacitors to be complete. None of these four external discrete components must be matched or of the high precision variety. The system will accept a wide range of external power supply voltages and draws a supply current of less than two milliamperes when supply voltages are .+-.5 V.